2007 IEEE Radio and Wireless Symposium, RWS, Long Beach, CA, Amerika Birleşik Devletleri, 9 - 11 Ocak 2007, ss.153-156, (Tam Metin Bildiri)
This paper presents implementation of some CDMA system compatible antenna array algorithms such as least mean square (LMS), constant modulus (CM) and space code correlator (SCC) on FPGA (such as Xilinx Virtex II Pro FPGA). Implementation issues such as architecture complexity and weight vector computation times are presented. For the signal modeling, cdma2000 reverse link signal model is considered using uniform linear array (ULA) topology. Results show that FPGA based implementation provides relatively short weight vector computation times compared to previously obtained DSP based implementations. © 2007 IEEE.